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E2E1015-27-Y4
Semiconductor MSM65522/65P522
Semiconductor 8-Bit Microcontroller with A/D Converter
ThisMSM65522/65P522 version: Jan. 1998 Previous version: Nov. 1996
GENERAL DESCRIPTION
The MSM65522 is a high-performance 8-bit microcontroller that employs OKI original nX-8/50 CPU core. With a minimum instruction execution time of 400 ns (10MHz clock), the MSM65522 is capable of high-speed processing, and includes 8K bytes of program memory, 384 bytes of data memory (RAM), timers, serial ports and an A/D converter on chip. Also available is the MSM65P522, which replaces the on-chip program memory with one-time PROM.
FEATURES
* Operating range Operating frequency Operating voltage Operating temperature * Memory space Internal program memory Internal data memory * Minimum instruction execution time * Powerful instruction set : 1 to 10MHz (VDD=4.5 to 5.5V) 1 to 5MHz (VDD=2.7 to 5.5V) : 2.7 to 5.5V : - 40 to +85C : : : : 8K bytes 384 bytes 400ns @ 10 MHz 81 basic instructions 8/16-bit operation instructions Bit manipulation instructions Compound function instructions
* Abundant addressing modes * I/O ports Input only port * Timers
* Counters * Serial ports * A/D converter * External interrupts * Interrupt sources * Package Options 42-pin plastic shrink DIP (SDIP42-P-600-1.78)
: 8-bit 3 4-bit 1 : 8-bit 1 : 8-bit auto-reload timer 3 (One timer is shared by the baud rate generator. Combining the 8-bit timers, it is possible to use the timers as a 16-bit timer (1 channel).) Watchdog timer 1 : Time base counter (14-bit) 1 : Shift register 1 Serial port with baud rate generator (UART/Synchronous) 1 : 8 bits 8 channels :3 : 11
: (Product name:MSM65522-SS, MSM65P522-SS) 42-pin plastic DIP (DIP42-P-600-2.54) : (Product name:MSM65522-RS, MSM65P522-RS) 44-pin plastic QFP (QFP44-P-910-0.80-2K) : (Product name:MSM65522-GS-2K, MSM65P522-GS-2K) 44-pin plastic QFJ (QFJ44-P-S650-1.27) : (Product name:MSM65522-JS, MSM65P522-JS) indicates the code number. * Specifications are subject to change without notice. 1/22
BLOCK DIAGRAM
Semiconductor
ROM (8K bytes)
OSC0 OSC1 RESET HSTOP*
8
OSC. CONT. INST. DEC.
CPU CORE
8
VDD GND TEST
T
ALU C IR
GMAR PC BUS CONT.
RAM (384bytes)
TBC
WDT
8
SIO AR BR PSW SP LMAR
TXD* RXD*
8bit TIMER3**
T1OUT* T0CK* GATE* SFTO* SFTI* SFTCK*
8bit ADC 8ch
I
O PORT
8bit SHIFT-REG.
MSM65522/65P522
INTERRUPT CONT.
AI0* to AI7* PO P1 P2 P3 P6
INT0* INT1* INT2*
* Indicates the secondary function of the port. ** One of the asterisked items is used in the SIO baud rate generator.
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Semiconductor
MSM65522/65P522
PIN CONFIGURATION (TOP VIEW)
P3.0 P3.1 P3.2 P3.3 P3.4 / INT2 P3.5 / SFT0 P3.6 / SFTI P3.7 / SFTCK RESET P2.0 / RXD P2.1 / TXD P2.2 / INT0 P2.3 / INT1/ GATE P2.4 / TOCK P2.5 / HSTOP P2.6 P2.7 / T1OUT P1.3 OSC1 OSC0 GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
VDD P6.0 / AI0 P6.1 / AI1 P6.2 / AI2 P6.3 / AI3 P6.4 / AI4 P6.5 / AI5 P6.6 / AI6 P6.7 / AI7 TEST P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 P1.0 P1.1 P1.2
42-Pin Plastic Shrink DIP
P3.0 P3.1 P3.2 P3.3 P3.4 / INT2 P3.5 / SFT0 P3.6 / SFTI P3.7 / SFTCK RESET P2.0 / RXD P2.1 / TXD P2.2 / INT0 P2.3 / INT1/ GATE P2.4 / TOCK P2.5 / HSTOP P2.6 P2.7 / T1OUT P1.3 OSC1 OSC0 GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
VDD P6.0 / AI0 P6.1 / AI1 P6.2 / AI2 P6.3 / AI3 P6.4 / AI4 P6.5 / AI5 P6.6 / AI6 P6.7 / AI7 TEST P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 P1.0 P1.1 P1.2
42-Pin Plastic DIP 3/22
Semiconductor
MSM65522/65P522
PIN CONFIGURATION (TOP VIEW) (Continued)
44 P3.4 / INT2 34 P6.3 / AI3 35 P6.2 / AI2 37 P6.0 / AI0 36 P6.1 / AI1
39 GND
43 P3.3
42 P3.2
41 P3.1
40 P3.0
P3.5 / SFT0 P3.6 / SFTI P3.7 / SFTCK RESET P2.0 / RXD P2.1 / TXD P2.2 / INT0 P2.3 / INT1/ GATE P2.4 / TOCK P2.5 / HSTOP P2.6
1 2 3 4 5 6 7 8 9 10 11
38
VDD
33 32 31 30 29 28 27 26 25 24 23
P6.4 / AI4 P6.5 / AI5 P6.6 / AI6 P6.7 / AI7 TEST P0.0 P0.1 P0.2 P0.3 P0.4 P0.5
P2.7 / T1OUT 12
13
15
16
17
18
19
P0.7 21
OSC1 14
OSC0
P1.3
P1.2
NC: No-connection pin 44-Pin Plastic QFP
GND
P1.1
P0.6 22
P1.0 20
NC
4/22
Semiconductor
MSM65522/65P522
PIN CONFIGURATION (TOP VIEW) (Continued)
P6.4 / AI4
P6.5 / AI5
P6.6 / AI6
P6.7 / AI7
TEST
P0.0
P0.1
P0.2
P0.3
P0.4
39 38 37 36 35 34 33 32 31 30 29 P6.3 / AI3 P6.2 / AI2 P6.1 / AI1 P6.0 / AI0 VDD P3.0 P3.1 P3.2 P3.3 P3.4 / INT2 NC 40 41 42 43 44 1 2 3 4 5 6 7 P3.5 / SFT0 8 P3.6 / SFTI 9 P3.7 / SFTCK 10 11 12 13 14 15 16 17 P2.3 / INT1/ GATE P2.0 / RXD P2.1 / TXD P2.2 / INT0 P2.4 / TOCK RESET P2.5 / HSTOP P2.6 28 27 26 25 24 23 22 21 20 19 18 NC P0.6 P0.7 P1.0 P1.1 P1.2 GND OSC0 OSC1 P1.3 P2.7 / T1OUT
NC: No-connection pin 44-Pin Plastic QFJ
P0.5
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Semiconductor
MSM65522/65P522
PIN DESCRIPTION
Basic Functions
Function Power Supply Symbol VDD GND OSC0 Oscillation OSC1 RESET Control TEST P0.0 to P0.7 P1.0 to P1.3 P2.0 Port to P2.7 P3.0 to P3.7 P6.0/AI0 to P6.7/AI7 I I/O I/O 8-bit input/output port (Port 2): input or output can be selected for each bit by the port 2 direction register (P2DIR). In addition to their input/ output port functions, the pins of port 2 have secondary functions: see the next table. 8-bit input/output port (Port 3): input or output can be selected for each bit by the port 3 direction register (P3DIR). In addition to their input/ output port functions, the pins of port 3 have secondary functions: see the next table. 8-bit input port (Port 6): Functions as analog input channel during A/D conversion. I/O 8-bit input/output port (Port 1) I I/O O I Type -- -- I Description +5V digital power supply (common to analog power supply) 0V digital ground (common to analog ground) Oscillator input pin: connects to a crystal oscillator (or ceramic resonator) or external clock. The master clock and external clock are used as the system clock without frequency division. Oscillator input pin: connects to a crystal oscillator (or ceramic resonator). When an external clock is input to OSC0, leave OSC1 open. System reset input: when this pin goes low, the internal state of the chip is initialized and program execution restarts from address 0040H. The input is pulled up to VDD with an internal pull-up resistor. Test input pin: connects to ground pin. 8-bit input/output port (Port 0)
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Semiconductor Secondary Functions
Function Symbol RXD Serial Port TXD O Type I/O P2.0 secondary functions. Description
MSM65522/65P522
UART: Input pin for a synchronous communication receive data. Synchronous: Input/output pin for serial port transmit/receive data. P2.1 secondary functions. UART: Input pin for a synchronous communication receive data. Synchronous: Output pin for serial port synchronizing clock. INT0 I Secondary function of P2.2 input pin for external interrupt 0. The interrupt can be triggered by the rising edge, falling edge, or both edges of rising or falling. INT1/Gate I Secondary function of P2.3 input pin for external interrupt 1. The interrupt can be triggered by the rising edge, falling edge, or both rising and falling edges. Also used as a gate signal input pin for gating the counter of timer 0. INT2 I Secondary function of P3.4 input pin for external interrupt 2. The interrupt can be triggered by the rising edge, falling edge, or both rising and falling edges. HSTOP I Secondary function of P2.0 input pin for hardware stop mode. If this pin goes low while the HSTP bit in SBYCON is set to 1, the chip enters hard stop mode. In hardware stop mode the clock stops and the CPU and on-chip peripheral functions shut down to conserve power. SFTO SFTI O I I/O P3.5 secondary functions. Shift register data output pin. P3.6 secondary functions. Shift register data output pin. SFTCK P3.7 secondary functions. Shift register synchronizing clock input/output pin. In master mode: clock output In slave mode: clock input
External interrupt
Control
Shift Registers
Timer 0 Timer 1 A/D Converter
T0CK T1OUT AI0 to AI7
I O O
Secondary function of P2.4: external clock input pin for timer 0. Secondary function of P2.7: outputs a waveform with twice the cycle of the overflow interval of timer 1. Secondary function of P6.0 to P6.7: functions as analog input channel in A/D conversion.
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Semiconductor
MSM65522/65P522
MEMORY MAPS
Local Memory Space 1FFH Page 1
Data Memory
General Memory Space 1FFFH
Program Memory
100H
SFR
100H
Vector Call Table Area
80H
Data Memory
Internal Memory
Page 0
80H 40H 20H 0
Program Memory Interrupt Vector Table Area Vector Call Table Area
40H 30H 20H 10H 0
Local Register Set 3 Local Register Set 2 Local Register Set 1 Local Register Set 0
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Semiconductor
MSM65522/65P522
ABSOLUTE MAXIMUM RATINGS
Parameter Supply Voltage Input Voltage Output Voltage Analog Input Voltage Power Dissipation Storage Temperature Symbol VDD VI VO VAI PD TSTG Ta=25C per package Ta=25C per one output -- Ta=25C Condition Rating -0.3 to +7.0 -0.3 to VDD+0.3 -0.3 to VDD+0.3 -0.3 to VDD+0.3 400 50 -55 to +150 mW C V Unit
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage Analog Input Voltage Memory Hold Voltage Operating Frequency *1 External Clock Operating Frequency Operating Temperature Symbol VDD VAI VDDMH fOSC fEXTCLK TOP Condition fOSC 10 MHz fOSC 5 MHz -- fOSC=0 Hz VDD=4.5 to 5.5 VDD=2.7 to 4.5 VDD=4.5 to 5.5 VDD=2.7 to 4.5 -- Range 4.5 to 5.5 2.7 to 5.5 0 to VDD 2.0 to 5.5 1 to 10 1 to 5 0 to 10 0 to 5 -40 to +85 MHz MHz C V Unit
*1 This is due to the standard of a crystal oscillator or resonator.
Ta=-40 to +85C 10
fOSC, fEXTCLK (MHz)
8 6 5 4 2 1 2 3 2.7 4 VDD (V) 5 5.5 6 * Operating Frequency is more than 1MHz.
Figure 1. Supply Voltage vs. Operating frequency
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Semiconductor
MSM65522/65P522
ELECTRICAL CHARACTERISTICS
DC Characteristics 1 (VDD=4.5 to 5.5V, 5V Version)
(GND=0V, Ta=-40 to +85C) Parameter Schmitt Trigger Circuit Input Voltage "H" Input Voltage 1 "H" Input Voltage 2 "L" Input Voltage "H" Output Voltage 2 "L" Output Voltage 1 Input Leakage Current 1 Input Leakage Current 2 Pull-up Resistor Input Capacitance Current Consumption Current Consumption *8 *5 *6 *7 *1 *2 *3 *4 Symbol VT- VT+ VT VIH1 VIH2 VIL VOH VOL ILI1 ILI2 RRST CI IDDS IDD -- -- -- IOH=-400mA IOL=1.6mA VI=VDD/0V VI=VDD/0V VI=0V f=1MHz, Ta=25C 5V, Stop mode fOSC=10MHz, 5V, no load -- Condition Min. 0.3VDD -- --
0.3VDD+0.7
Typ. -- -- 1.0 -- -- -- -- -- -- -- 50 5 2 25
Max. -- 0.7VDD -- VDD+0.3 VDD+0.3
0.3VDD-0.3
Unit
0.7VDD -0.3 VDD-0.4V -- -- -- 30 -- -- --
V
-- 0.4 1 10 80 -- 50 35 mA KW pF mA mA
*1 *2 *3 *4 *5 *6 *7 *8
P0 to P3 (Includes secondary function inputs) P6 OSC0 and RESET P6, OSC0, RESET P6 Excludes P6. RESET sets to VDD and TEST sets to 0V RESET The ports set for input mode are V DD or 0V, the ports except these are no load and A/D converter is not active.
10/22
Semiconductor DC Characteristics 2 (2.7 to 4.5V, 3V Version)
MSM65522/65P522
(GND=0V, Ta=-40 to +85C) Parameter Schmitt Trigger Circuit Input Voltage "H" Input Voltage "H" Input Voltage "L" Input Voltage "H" Output Voltage "L" Output Voltage Input Leakage Current 1 Input Leakage Current 1 Pull-up Resistor Input Capacitance Current Consumption Current Consumption *8 *5 *6 *7 *1 *2 *3 *4 Symbol VT- VT+ VT VIH1 VIH2 VIL VOH VOL ILI1 ILI1 RRST CI IDDS IDD -- -- -- IOH=-20mA IOL=20mA VI=VDD/0V VI=VDD/0V VI=0V f=1MHz, Ta=25C 3V, stop mode 5MHz, 3V, no load -- Condition Min. 0.3VDD -- -- 0.3VDD+0.7 0.7VDD+0.3 -0.3 VDD-0.1 -- -- -- 30 -- 1 10 Typ. -- -- 0.5 -- -- -- -- -- -- -- 50 5 -- 6 Max. -- 0.7VDD -- VDD+0.3 VDD+0.3 0.3VDD-0.3 -- 0.1 1 1 80 -- 25 15 mA KW pF mA mA V Unit
*1 *2 *3 *4 *5 *6 *7 *8
P0 to P3 (Includes secondary function inputs) P6 OSC0 and RESET P6, OSC0, RESET P6 Excludes P6. RESET sets to VDD and TEST sets to 0V. RESET The ports except these are no load, and A/D converter active.
AC Characteristics CPU control (OSC0 Clock)
(VDD=2.7 to 5.5 V, GND=0V, Ta=-40 to +85C) Parameter Clock Period "L" Clock Pulse Width "H" Clock Pulse Width Clock Period "L" Clock Pulse Width "H" Clock Pulse Width Symbol tC tCLW tCHW tC tCLW tCHW VDD=2.7 to 4.5 V VDD=4.5 to 5.5 V Condition Min. 100 45 45 200 90 90 Max. -- -- -- -- -- -- ns Unit
CPU control (OSC0 Clock)
tCHW OSC0 tCLW tC
11/22
Semiconductor
MSM65522/65P522
10MHz 50 40 Max.
IDD (mA)
30 Typ. 20 10 2 3 4 5 VDD (V) 6
6MHz 50 40 Max.
IDD (mA)
30 20 10 2 3 4 5 VDD (V) 6 Typ.
2MHz 50 40
IDD (mA)
30 20 10 2 3 4 5 VDD (V) 6 Ta=-40 to +85C, no load Max. Typ.
Figure 2. Voltage vs. Current
12/22
Semiconductor * CPU control
MSM65522/65P522
(VDD=2.7 to 5.5V, GND=0V, Ta=-40 to +85C) Parameter RESET Pulse Width *1 RESET Pulse Width *2 Symbol tRESW1 tRESW2 Condition -- -- Min. 20
*3
Max. -- --
Unit ns --
*1 Excluding power ON, stop mode and hard stop mode. *2 In power ON, stop mode and hard stop mode. *3 Oscillation stabilization time depends on resonator. RESET Pulse Width
tRESW1, 2 RESET
* Peripheral control 1
(VDD=2.7 to 5.5V, GND=0V, Ta=-40 to +85C) Parameter OSC Clock Period External Interrupt Pulse Width External Clock Pulse Width GATE Pulse Width Symbol tC tEXIW tT0CW tT0GW -- Condition VDD=4.5 to 5.5V VDD=2.7 to 4.5V Min. 100 200 4 tC 4 tC 1 tTOCLK *1 Max. -- -- -- ns -- Unit
EXI
T0
--
*1 tT0CLK : Timer 0 count clock period selected by T0CON.
13/22
Semiconductor 1) OSC0
tC OSC0 tCLW
MSM65522/65P522
2) EXI Pulse Width
tEXIW INT0-2
3) T0
tT0CW T0CK tT0GW GATE
14/22
Semiconductor * Peripheral control 2
MSM65522/65P522
(VDD=AVDD=2.7 to 5.5V, GND=0V, Ta=-40 to +85C) Parameter OSC Clock Period SFTCK Period SFTCK "L" Pulse Width SFT SFTCK "H" Pulse Width SFTO Setup Time SFTO Hold Time SFTI Setup Time SFTI Hold Time Synchronous Clock Period Synchronous Clock "L" Pulse Width Symbol tC tSFC tSFCLW tSFCHW tSFOS tSFOH tSFIS tSFIH tSIC tSICLW tSICHW tSIOS tSIOH tSIIS tSIIH CL=100pF Condition VDD=4.5 to 5.5V VDD=2.7 to 4.5V Min. 100 200 8 tC 4 tC-20 4 tC-20 tSFCLW-100 tSFCHW-100 100 100 8 tC 4 tC-20 4 tC-20 6 tC-100 2 tC-100 tC+tCLW+100 0 Max. -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- ns Unit
SIO (Clock Synchronous Clock "H" Synchro- Pulse Width nous Output Data Setup Time Mode) Output Data Hold Time Input Data Setup Time Input Data Hold Time
15/22
Semiconductor
MSM65522/65P522
1) SFT
tSFC tSFCLW SFTCK tSFCHW
tSFOS SFTO tSFIS SFTI
tSFOH
tSFIH
2) SIO (Clock Synchronous Mode)
tSIC tSICLW TXD tSICHW
tSIOS RXD (transmission) tSIIS RXD (reception)
tSIOH
tSIIH
16/22
Semiconductor A/D Converter Characteristics
MSM65522/65P522
(VDD=4.5 to 5.5V/2.7 to 4.5V, GND=0V, Ta=-40 to +85C) Parameter Resolution Absolute Error Symbol n EL Analog input source impedance RI5kW Condition See the recommended circuit (Fig. 3). Min. -- -- Typ. 8 -- Max. -- +1.5/+2 -1.5/-2 -- -- -- See the measuring circuit (Fig. 4). fOSC=10 MHz / 5 MHz -- -- -- -- -- -- 16/32 0.5/1 +1.5/+2 -1.5/-2 0.5/1 -- LSB LSB LSB LSB ms/CH Unit bit LSB
Differential Linearity Error Zero Point Error Full Scale Error Crosstalk Conversion time *
ED EZS EFS ECT tCONV
*
14.8/2.96ms/CH for the one time conversion follows setting the GO bit.
Definitions of Terms (1) Resolution The minimum distinguishable analog value. For 8 bits, 28=256, i.e. (VRH-VRL) / 256. Linearity Error The variance between the ideal conversion characteristics as an 8-bit A/D converter and actual conversion characteristics (does not include quantatized error). The ideal conversion characteristics refer to steps of the voltage between VRH and VRL into 256 intervals. (3) Differential Linearity Error Indicates the smoothness of the conversion. The width of analog input voltage corresponding to the change by one bit of digital output is 1 LSB = (VRH-VRL) / 256 ideally. The variance between this ideal bit size and bit size at arbitrary point in the conversion range. Zero Scale Error The variance between the ideal conversion characteristics at the switching point of digital outputs "000H to 001H" and actual conversion characteristics. Full Scale Error The variance between the ideal conversion characteristics at the switching point of digital outputs "0FEH to 0FFH" and actual conversion characteristics.
(2)
(4)
(5)
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Semiconductor
MSM65522/65P522
VDD
VDD
MSM65522 - Analog Voltage Input + R1
+ 0.1 mF 47 mF
AI0 to 7 0V GND 0.1 mF
RI (Analog input source impedance)5kW
Figure 3. Recommended Circuit
- Analog Voltage Input +
5kW AI0 AI1 Crosstalk is defined as the difference of A/D conversion result between supplying the same voltage to AI0 to AI7 and supplying voltage shown in this diagram.
0.1 mF
AI7
VREF or AGND
Figure 4. Crosstalk Measuring Circuit
18/22
Semiconductor
MSM65522/65P522
PACKAGE DIMENSIONS
(Unit : mm)
SDIP42-P-600-1.78
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 4.52 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
19/22
Semiconductor
MSM65522/65P522
(Unit : mm)
DIP42-P-600-2.54
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 6.20 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
20/22
Semiconductor
MSM65522/65P522
(Unit : mm)
QFP44-P-910-0.80-2K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 0.41 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
21/22
Semiconductor
MSM65522/65P522
(Unit : mm)
QFJ44-P-S650-1.27
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin Cu alloy Solder plating 5 mm or more 2.00 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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